A method and apparatus for operating a synchronous memory from a plurality of external clock signals is described. By providing external system, read, and write clock signals, a memory is operated by delaying operational clock signals, such as read and write clock signals, with respect to a system clock...http://www.google.fr/patents/US5923611?utm_source=gb-gplus-shareBrevet US5923611 - Memory having a plurality of external clock signal inputs
Memory having a plurality of external clock signal inputs
