An SRAM cell having a word line shorter than a bit line is provided. First and second driver transistors having first and second gate electrodes parallel to each other are formed on a semiconductor substrate, and a third gate electrode shared by first and second transfer transistors is formed between...http://www.google.fr/patents/US6184588?utm_source=gb-gplus-shareBrevet US6184588 - SRAM cell having bit line shorter than word line
