Direct Moat Isolation for VLSI integrated circuit structures is formed by growing oxide over the entire substrate area, and then cutting windows in the oxide, using an anisotropic polymer-free oxide etch, where moat regions are to be formed. To prevent polysilicon filamentation, gate patterning is performed...http://www.google.fr/patents/US4418094?utm_source=gb-gplus-shareBrevet US4418094 - Vertical-etch direct moat isolation process
