In the present invention, memory chips are stuck together in stacked fashion by TAB (tape automated bonding), and a multiple memory chip and lead complex like an SOP (small out-line package) is formed of the chips and leads, whereby a memory module of high packaging density can be realized by a flat...http://www.google.fr/patents/US5138438?utm_source=gb-gplus-shareBrevet US5138438 - Lead connections means for stacked tab packaged IC chips
Lead connections means for stacked tab packaged IC chips
