An apparatus includes a first memory which includes a plurality of memory regions, a second memory which stores initializing information indicating whether each of the memory regions is initialized, the second memory controlling a coherency between the first memory and a cache memory, and a control circuit...http://www.google.fr/patents/US8069312?utm_source=gb-gplus-shareBrevet US8069312 - Apparatus, circuit and method of controlling memory initialization
Apparatus, circuit and method of controlling memory initialization
