A method of designing a pattern of a hole pattern having a configuration, in which grid of interval smaller than a minimum permissible pitch according to a design rule for a semiconductor integrated circuit is provided in a pattern drawing, a hole pattern is arranged on a first lattice point which is...http://www.google.fr/patents/US20080086712?utm_source=gb-gplus-shareBrevet US20080086712 - METHOD OF DESIGNING A PATTERN
Numéro de demande: 11/867,841 Numéro de publication: US 2008/0086712 A1 Date de dépôt: 5 oct. 2007 Brevet délivré: US7870514 ( Date de délivrance 11 janv. 2011)
