A pipelined linecard architecture for receiving, modifying, switching, buffering, queuing and dequeuing packets for transmission in a communications network. The linecard has two paths: the receive path, which carries packets into the switch device from the network, and the transmit path, which carries...http://www.google.fr/patents/US6778546?utm_source=gb-gplus-shareBrevet US6778546 - High-speed hardware implementation of MDRR algorithm over a large number of queues
High-speed hardware implementation of MDRR algorithm over a large number of ...
