A computer aided design system and method for placing repeater buffers on a floor plan of an integrated circuit chip. The system includes a repeater placement tool that provides a near optimal placement of repeaters on the floor plan of a chip. The tool utilizes chip design netlist data indicating need...http://www.google.fr/patents/US6449759?utm_source=gb-gplus-shareBrevet US6449759 - System and method for automatic insertion and placement of repeater buffers on an integrated circuit floor plan
System and method for automatic insertion and placement of repeater buffers ...
