The system and method of the present invention is embodied in a multi-state on-chip logic analyzer that is preferably integrated into a VLSI circuit. In general, the logic analyzer is preferably coupled to a multilevel trace array for storing event trace data generated by the logic analyzer. Input and...http://www.google.fr/patents/US6633838?utm_source=gb-gplus-shareBrevet US6633838 - Multi-state logic analyzer integral to a microprocessor
Multi-state logic analyzer integral to a microprocessor
