A Programmable Logic Device (PLD) is provided with configuration memory cells displaying a superior soft error immunity by combating single event upsets (SEUs) as the configuration memory cells are regularly refreshed from non-volatile storage depending on the rate SEUs may occur. Circuitry on the PLD...http://www.google.fr/patents/US7764081?utm_source=gb-gplus-shareBrevet US7764081 - Programmable logic device (PLD) with memory refresh based on single event upset (SEU) occurrence to maintain soft error immunity
Programmable logic device (PLD) with memory refresh based on single event ...
