A method for forming a Bi-CMOS structure, wherein a vertical npn transistor and CMOS transistors are formed on a single semiconductor substrate, is disclosed. After forming a p-type epitaxial silicon layer on a p-type silicon substrate with a plurality of n.sup.+ -type buried layers therein, n-type wells...http://www.google.fr/patents/US4484388?utm_source=gb-gplus-shareBrevet US4484388 - Method for manufacturing semiconductor Bi-CMOS device
Method for manufacturing semiconductor Bi-CMOS device
