Memory apparatus and methods utilizing multiple bit lanes may redirect one or more signals on the bit lanes. A memory agent may include a redrive circuit having a plurality of bit lanes, a memory device or interface, and a fail-over circuit coupled between the plurality of bit lanes and the memory device...http://www.google.fr/patents/US20100281315?utm_source=gb-gplus-shareBrevet US20100281315 - MEMORY CHANNEL WITH BIT LANE FAIL-OVER
Numéro de demande: 12/836,953 Numéro de publication: US 2010/0281315 A1 Date de dépôt: 15 juil. 2010 Brevet délivré: US8020056 ( Date de délivrance 13 sept. 2011)
