A digital computer is arranged to process data through an arithmetic logic unit in response to instructions residing sequentially in an instruction register, each instruction requiring a single instruction interval for fetching data from a selected source in a store, processing the data in the arithmetic...http://www.google.fr/patents/US4525776?utm_source=gb-gplus-shareBrevet US4525776 - Arithmetic logic unit arranged for manipulating bits
Arithmetic logic unit arranged for manipulating bits
