The present invention is directed to novel antifuse arrays and their methods of fabrication. According to an embodiment of the present invention an array comprises a plurality of first spaced apart rail-stacks having a top semiconductor material. A fill dielectric is located between the first plurality...http://www.google.fr/patents/US6541312?utm_source=gb-gplus-shareBrevet US6541312 - Formation of antifuse structure in a three dimensional memory
Formation of antifuse structure in a three dimensional memory
