A buffer-memory coherence control mechanism for a data processing system includes a coherence control identification device. For each entry of a second buffer memory to which a plurality of first buffer memories is connected, a control bit for coherence control is stored in a control bit table. The control...http://www.google.fr/patents/US5636365?utm_source=gb-gplus-shareBrevet US5636365 - Hierarchical buffer memories for selectively controlling data coherence including coherence control request means
Hierarchical buffer memories for selectively controlling data coherence ...
