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METHOD FOR ROUTING MESSAGES
BACKGROUND OF THE INVENTION
The invention relates to a method for transmitting mes- 5 sages in packet switching networks.
DESCRIPTION OF THE RELATED ART
In packet switching networks, a message is not transmit- 1Q ted between a transmitter and a receiver in that a permanent connection is established between the transmitter and the receiver via which information is transmitted between transmitter and receiver. Instead, the information is transmitted in the form of packets which consist of an address header and 15 an actual message component possibly of variable length which independently seek out their path to the receiver through the network. For this purpose, at each network node there is a switching element which evaluates the address information of each packet and passes on the packet along 2Q a suitable path.
Such packet switching networks are used in various fields of communication and data technology, especially in the field of parallel-computer connection networks. With the aid of such packet switching networks, considerably more infor- 25 mation can be transmitted with the same line capacity than in conventional networks in which between each transmitter and each receiver a line which is reserved for this transmitter-receiver pair has to be established. Especially in parallelcomputer connection networks, this method is based on the 30 highest possible network throughput since the computing power of a parallel-computer system depends in a sensitive manner on the network throughput of its connection network. In such packet switching networks, when the switching units are involved in corresponding activity blockages 35 occur repeatedly and greatly reduce the network throughput. These blockages can be avoided by correspondingly increasing the number of outputs per switching element or by controlling the network centrally, which, however generally would lead to unacceptably high costs or would involve a 40 central control of the network, which is not desired.
An output of a switching element is blocked if at any time two or more packets require the same output to continue their path. Except for one, all these packets must be buffered. This can take place either completely within the switching 45 element in question or be distributed over several switching elements.
From the literature, distributed methods are known which are used to transmit messages in packet switching networks. The common feature of these methods is that precisely one 50 output is associated with each transmission node of the network at each receiver address. With correspondingly high capacity utilization of a network in parallel-computer connection networks, considerable blockages can occur at individual outputs, during which blockages a large number of 55 packets have to be buffered. As a result of these blockages and the reduction of the network throughput associated with these blockages, perceptible degradations in performance can occur in parallel-computer systems.
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SUMMARY OF THE INVENTION
The invention is based on the object of disclosing a method for routing messages in packet switching networks which avoids the described disadvantages of known meth- 65 ods and which is suitable for bringing about an increased network throughput in such networks. This object is
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achieved with the aid of a method for routing messages whereby
—each destination address at each switching element has a group of outputs of this switching element assigned to it,
—a free output is sought within this group,
—the message is delayed as long as no output is free within the group, and
—the individual outputs of a group are connected to different transmission paths.
Advantageous developments of the method include providing that the of a group of outputs takes place in such a way that each destination address has a sub-set of all the destination addresses allocated to it and each of these sub-sets has a group of outputs assigned to it. Further, in method may include:
—the set of all destination addresses has an address interval assigned to it which is subdivided into address subintervals,
—the set of all outputs has an output interval assigned to it which is subdivided into output sub-intervals and
—each address sub-interval has an output sub-interval allocated to it.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 shows a parallel-computer network.
FIG. 2 shows a network node of the network in FIG. 1, which comprises a transputer with a switching element (router).
FIG. 3 shows the improvement in interval routing according to the invention.
DETAILED DESCRIPTION OF THE
PREFERRED EMBODIMENTS
The invention is described in greater detail below with reference to a preferred exemplary embodiment and to the figures.
A typical area of application of the invention is connection networks in parallel-computer systems since, in such systems, intensive communication is required between the system elements, which communication generally leads to high network loading. The effects of the invention are more advantageous the higher the network loading. For this reason, the invention is described below with reference to an exemplary embodiment from the field of parallel-computer networks.
So-called transputer systems form an important class of parallel-computer systems. The technical foundations of these systems are described in the publication by D. May and P. Thompson, "Transputers and Routers: Components for Concurrent Machines", Proceedings of Japanese Occam User-Group, 1990. The publication by D. Pountain, "Virtual Channels; The next generation of Transputers", BYTE April 90, Europe and World: 3-12, Apr. 1990, contains a comprehensive presentation of the new transputer generation which operates with virtual addresses. The specialized terms used in this description from the field of parallel-computer systems are generally known and taken from the technical articles that have been cited.
FIG. 1 shows a typical connection network with six network nodes NN1,..., NN6. Each connection node here has for example the form indicated in FIG. 2 which consists of a connection element (router) and a processor element (transputer). Each network node is connected via a number of network connections SL to further network nodes, as can be seen in FIG. 1. Each network node contains, as illustrated
