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US006914853B2
(12) United States Patent ao) Patent No.: us 6,914,853 B2
Coulson (45) Date of Patent: Jul. 5,2005
(54) MECHANISM FOR EFFICIENT WEAROUT COUNTERS IN DESTRUCTIVE READOUT MEMORY
(75) Inventor: Richard L. Coulson, Portland, OR (US)
(73) Assignee: Intel Corporation, Santa Clara, CA (US)
( * ) Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 0 days.
(21) Appl. No.: 10/712,432
(22) Filed: Nov. 12, 2003
(65) Prior Publication Data
US 2004/0095840 Al May 20, 2004
Related U.S. Application Data
(63) Continuation of application No. 09/966,499, filed on Sep. 27, 2001, now abandoned.
(51) Int. C I. G11C 8/00
(52) U.S. CI 365/236; 365/145; 365/185.11;
365/185.24; 711/103
(58) Field of Search 365/236, 145,
365/185.11, 185.24; 711/103
