Multichip mounted structure, electro-optical apparatus, and electronic apparatus

(54) MULTICHIP MOUNTED STRUCTURE, ELECTRO-OPTICAL APPARATUS, AND ELECTRONIC APPARATUS

(75) Inventor: Kenji Uchiyama, Hotaka-machi (JP)

(73) Assignee: Seiko Epson Corporation (JP)

( * ) Notice: Subject to any disclaimer, the term ol this patent is extended or adjusted under 35 U.S.C. 154(b) by 92 days.

(21) Appl. No.: 09/585,154

(22) Filed: Jun. 1, 2000

(30) Foreign Application Priority Data

Jun. 2, 1999 (JP) 11-155234

(51) Int. CI.7 H05K 7/02; H05K 7/06;

H05K 7/08; H05K 7/10

(52) U.S. CI 361/760; 361/761; 361/764;

361/736; 361/749; 361/803; 361/735; 361/748;

361/790

(58) Field of Search 361/760, 761,

361/764, 736, 749, 813, 735, 790, 803, 748; 385/2, 8, 14

(56) References Cited

U.S. PATENT DOCUMENTS

4,767,170 A * 8/1988 Mizutani et al 385/129

4,927,230 A * 5/1990 Tokumitsu 385/17

5,289,345 A * 2/1994 Corradetti et al 361/752

5,606,440 A * 2/1997 Kawaguchi et al 349/188

5,737,272 A * 4/1998 Uchiyama et al 345/206

5,777,610 A * 7/1998 Sugimoto et al 345/206

5,847,796 A 12/1998 Uchiyama et al.

6,133,978 A * 10/2000 Tajima 349/150

6,158,115 A 12/2000 Tsukagoshi et al.

FOREIGN PATENT DOCUMENTS

A multichip mounted structure has a substrate 11 provided with substrate-side terminals 16a and 16fc and a plurality ol IC chips 12a and \2b provided with bumps 14a and 14fc, respectively, so that the substrate-side terminals 16a and 16fc are conductively connected with the bumps 14a and 14fc, respectively. The bumps 14a and 14fc provided on the plurality ol IC chips 12a and 12fc, respectively, form pairs ol terminal lines opposing each other. Since the plurality ol IC chips 12a and \2b are mounted on the substrate 11 so that central lines LI and L2 between the pairs ol terminal lines which are individually formed approximately coincide with each other, it is not necessary to transport a position ol a compressive head, and one piece ol ACF 19 can be commonly used.

CN

1160223 A 9/1997

22 Claims, 9 Drawing Sheets