BASIC ELEMENT FOR THE CONNECTION NETWORK OF A FAST PACKET SWITCHING NODE
 Inventors: Bruno Bostica, Pino; Antonella Daniele, Bareggio; Vinicio Vercellone, Venaria, all of Italy
 Assignee: Italtel Societa Italians
Telecommunicazioni s.p.a, Milan,
 Appl. No.: 859,502
 PCT Filed: Not. 27,1990
 PCT No.: PCT/EP90/02010
§ 371 Date: Jul. 29,1992
§ 102(e) Date: Jul. 29,1992  PCT Pub. No.: WO91/08633
PCT Pub. Date: Jun. 13, 1991
 Foreign Application Priority Data
Nov. 30, 1989 [IT] Italy 68059 A/89
 Int. Cl.s H04Q 11/04
 U.S. CI 370/60; 370/59
 Field of Search 370/60, 94.1, 100.1,
370/68, 62, 59, 58.1
 References Cited
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4,382,295 5/1983 Moffitt et al 370/68
4,575,844 3/1986 Kosuge et al 370/60
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Primary Examiner—Douglas W. Olms
Assistant Examiner—Shick Horn
A basic element for the interconnection network of a fast packet switching node, where a synchronization is made at bit input stream level, the cell beginning is identified and a stream conversion from the serial form to a word parallel form is performed. Cells are thus transformed in a completely parallel form and in the same form they are cyclically discharged in the subsequent cell time in a memory, where cells are written and read in a shared way on the basis of instructions given by a control unit, thus performing the switching function. The control unit is essentially based on the use of a content-addressed associative memory, where a fraction of the routing header and a code indicating the time sequence on which the cells are stored. Memory outgoing cells are reconverted from a completely parallel form to a form having the length of one word and therefore in a completely serial form at a bitrate equal to the input one.