[54] BASIC ELEMENT FOR THE CONNECTION NETWORK OF A FAST PACKET SWITCHING NODE
[75] Inventors: Bruno Bostica, Pino; Antonella Daniele, Bareggio; Vinicio Vercellone, Venaria, all of Italy
[73] Assignee: Italtel Societa Italians
Telecommunicazioni s.p.a, Milan,
Italy
[21] Appl. No.: 859,502
[22] PCT Filed: Not. 27,1990
[86] PCT No.: PCT/EP90/02010
§ 371 Date: Jul. 29,1992
§ 102(e) Date: Jul. 29,1992 [87] PCT Pub. No.: WO91/08633
PCT Pub. Date: Jun. 13, 1991
[30] Foreign Application Priority Data
Nov. 30, 1989 [IT] Italy 68059 A/89
[51] Int. Cl.s H04Q 11/04
[52] U.S. CI 370/60; 370/59
[58] Field of Search 370/60, 94.1, 100.1,
370/68, 62, 59, 58.1
[56] References Cited
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3,806,886 4/1974 McClellan et al 370/59
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OTHER PUBLICATIONS
"Switching ATM in a Broadband ISDN"; Networks 89
Birmingham; Jun. 1988; pp. 115-130.
"Technology Aspects for System 12 Broadband
ISDN";Boettle et al; IEEE Journal on Selected Areas in Communications; vol. SAC-5, No. 8, Oct. 1987; pp. 1242-1248.
"A Shared Buffer Memory Switch for an ATM Exchange"; Kuwahara et al.; International Conference on Communications, Jun. 11-14, 1989. "An Asynchronous Time-Division Switched Network"; Coudreuse et al. Centre National d'Etudesdes Telecommnications—France 1987. "The Knockout Switch: A Simple, Modular Architecture for High-Performance Packet Switching"; Yeh, et al., International Switching Symposium 1987 Proceedings; pp. 810-808.
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the Frame Work of a Hybrid BB ISDN Concept"; K.
A. Lutz, IEEE COMSOC International Workshop,
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Primary Examiner—Douglas W. Olms
Assistant Examiner—Shick Horn
[57] ABSTRACT
A basic element for the interconnection network of a fast packet switching node, where a synchronization is made at bit input stream level, the cell beginning is identified and a stream conversion from the serial form to a word parallel form is performed. Cells are thus transformed in a completely parallel form and in the same form they are cyclically discharged in the subsequent cell time in a memory, where cells are written and read in a shared way on the basis of instructions given by a control unit, thus performing the switching function. The control unit is essentially based on the use of a content-addressed associative memory, where a fraction of the routing header and a code indicating the time sequence on which the cells are stored. Memory outgoing cells are reconverted from a completely parallel form to a form having the length of one word and therefore in a completely serial form at a bitrate equal to the input one.
