NO COAT BACKSIDE WAFER GRINDING a dry film tape to the frontside of the finished integrated
PROCESS circuit chip wafer to cover and protect the integrated circuits
during the backside grinding process. The frontside protec
BACKGROUND OF THE INVENTION tive cover °f me integrated circuit chip wafer prevents
! T~ i J r -r 5 silicon residue contaminants from adhering to the metallic
1. Field of the Invention . . , c. . t , • A ■ ■ A- ^
„ , bond pads of the integrated circuits during grinding. Once
This invention is related generally to an apparatus and tUo ~^„M„„ „m„„„T, „„TM„w„ «,„ „„„^„„
^, . „ ... , , J~ . ^ . , the grinding process is complete, the spin-on coating is
method for grinding a backside surface of an integrated . , j . r ,. . ,
e A _<.• i i * * J etched away in a wet bath, or an applicable machine is used
circuit wafer and, more particularly, to an apparatus and . i . ... - rr
4, j c • j- i. i -j _c * • * * J to remove the dry film tape,
method for grinding a backside surface of an integrated J r
circuit wafer that includes use of a cushioned grinding table 10 Although the spin-on coating or dry film tape has effec
and an organic acid cooling fluid. tively prevented silicon residue from contaminating the
2. Discussion of the Related Art bond Pads durin8 S^^S, removal of the spin-on coating T..,.. ..... * • or dry film tape has resulted in contamination of the inte
In a typical integrated circuit manufacturing process, a 4. i . • v -j 4- 4, ^ 4. m.
1 e ■ 4 4 j • v • it 1 \ grated chips by residue from the coating or tape. This
plurality of integrated circuit chips are simultaneously pat- ^ ^ „ . f. J . „ 4.. .4, j • - M
... ... ... 4^. 4 -j _c * • 1 • ■■ 15 contamination can cause integrated circuit device failures or
terned and defined on a frontside surface of a single silicon . . . ., .. , . ,. .. ^ lL
e . . e, . .4. j4t.- Poor test yields. Also, the chuck table applies pressure to the
wafer by a series of layer deposition and etching processes iL «.-j _r c^. •,• * 1. \u ■ * 4 J
„ j . , . J . „F . ,. ., ... 65, . .. frontside surface of the silicon wafers where the integrated
well understood in the art. The individual integrated circuit . .4 , 4 . . , „,.
. . „ „ .. • c j 1 circuit chips are formed to hold the wafer in place. This
chips are generally patterned in a series of rows and columns r .. , . . . *\ , .
. r .B ,; 4 4, f ... 4j pressure sometimes causes damage to the integrated circuit
m a rectangular format on the wafer. MX&i the integrated ,n . • t- ■ ■ •. / • 4 ■. * A
•4 u- A 11 J « A 4-u * • 4U J- Ju 20 chips because epitaxial spikes or foreign material are formed
circuit chips are fully defined, the wafer is then diced by a ...... .4. . ,4. ,
v ul i.- i i- 1-4. 4U J dunng device layer deposition. Although the spin-on coating
suitable sawing machine along lines between the rows and . ^ . •/ ... .4. %
1 * 4U ■ 4 * J • v 44 4 * 4U or dry firm tape provides some cushioning against damage of
columns of the integrated circuit pattern to separate the J ^ , .. * . ^ .
f • * 4U • J- -j t • v • J- -j 1-4 * J this nature, the thickness of the coating or tape is not enough
wafer mto the individual circuits. The individual integrated . . ', . , . , . .. 6 . 5^ ?.
.... , . .... ... *T to protect the integrated circuit chips against many epitaxial
circuit chips can then be secured within protective packages „ ., A ^ ^ ■ 4, • 1 1 4^
, . 4 j • 4 • 4 1 4_: • • -4 "25 spikes and other foreign material commonly present from
and incorporated into appropriate electronic circuits. . . . . . _, . .. J r
,rr, „. . „ It «„,^,^o4,^, r., integrated circuit fabncation.
U.S. patent application Ser. No. 08/249,815 filed May 26, „„..,,. , , , . ,
1994, titled "Method of Preventing Aluminum Bond Pad 11What * nJeededcls » "f*?4 and ass^iated apparatus that
Corrosion During Dicing of Integrated Circuit Wafers," ^ndmS of a backside surface of a silicon wafer that
assignedtotheassigneeoftheinstantapplicationandherein 30 d°es not cause Pressu^e t0£the u?^rated TMl
incorporated by reference, discloses a method of preventing cluPs on a frontsid^surface of &e wafer, and does not aUow
metal bond pad corrosion and contamination during dicing contamination of the integrated circuit chips and associated
of integrated circuit wafers. This method incorporates use of metaUlc buond Pads' durm8 the grinding process. It is there
an organic acid cooling fluid that cools a saw blade of the fore an obJe<f of ^ Present invention to provide such an
sawing machine during dicing. The pH level of the cooling 35 ... and process.
fluid established by the organic acid prevents silicon residue SUMMARY OF THE INVENTION and particulates released from the wafer during the sawing
process from adhering to metallic bond pads of the indi- 111 accordance with the teachings of the present invention,
vidual integrated circuit chips, and thus allows the silicon a method and associated apparatus is disclosed for grinding
particulates to be washed away from the wafer with the 40 a backside surface of a semiconductor wafer that includes
cooling fluid. integrated circuit chips patterned on a frontside surface of
Generally, the original silicon wafer on which the inte- the wafer- The Process utiHzes a ^n0VJa grinding machine
grated circuits are patterned is sliced from a larger silicon that includes a plurality of rigid chuck tables that secure a
crystal ingot. The silicon wafers.are sliced from the crystal plurality of wafers to be moved relative to a series of
ingot to a thickness that is greater than desirable for a 45 grmdinS surfaces. The chuck tables each include a cush
finished integrated circuit product so as to provide a more ioned rubber Pad secured t0 the ^ble at an interface with the
robust wafer to stand up to the rigors of the integrated circuit frontside surface of the wafer. The cushion rubber pad is
fabrication processes. Particularly, relatively thick silicon thick enou& t0 Prevent imperfections in the frontside sur
wafers are necessary during the integrated circuit fabrication face of me siKcon wafer resulting from device fabrication
steps to prevent warpage and breakage of the wafer as a 50 from causinS dama2e t0 ^ integrated circuit chips under
result of certain heating processes, as well as other circuit the pressure that holds the chips to the chuck tables. 4\n
fabrication processes. However, the thickness of the wafer °>Wfc TMid cooling fluid is utilized during the grinding
after the integrated circuits are fabricated is thicker than procedure to prevent particulates and residue released from
desirable for device packaging restrictions. Therefore, it is the wafer during me grinding from adhering to the metal
necessary after the integrated circuit patterns are defined to 55 bond Pads of the iate&ate<i ckcuit chiPs
grind a backside surface of the wafer opposite to the Additional objects, advantages, and features of the present
frontside surface of the wafer where the integrated circuits invention will become apparent from the following descrip
are formed to reduce the wafer thickness prior to the wafer tion and appended claims, taken in conjunction with the
being diced to separate the wafer into the individual inte- accompanying drawings.
grated circuit chips Suitable grinding machines are well 60 BRTEF DESCRIPTION OF THE DRAWINGS known m the art that are capable of grinding down the
backside surface of the silicon wafer. Known types of FIG. 1 is a plan view of an integrated circuit wafer
grinding machines generally include a plurality of chuck backside grinding machine including a cushioned chuck
tables that secure a plurality of wafers to be ground by one table and an organic acid cooling fluid source according to
or more grinding wheels. 65 an embc<liment of the present invention;
The current industry standard is to apply either a spin-on FIG. 2 is a perspective view of a chuck table separated
coating of a resist material, or other applicable material, or from the grinding machine of FIG. 1;
