FAST DESTAGING METHOD USING PARITY ENGINE
 Inventors: Jin Pyo Kim; Joong Bae Kim; Yong Yeon Kim; Suk Han Yoon, all ol
Dejon-Shi, Rep. ol Korea
 Assignee: Electronics and Telecommunications Research Institute, Daejon, Rep. ol Korea
 Appl. No.: 09/141,094
 Filed: Aug. 26, 1998
 Foreign Application Priority Data
Dec. 22, 1997 [KR] Rep. of Korea 97-72066
 Int. C I. H03M 13/00
 U.S. CI 714/805; 714/6; 714/799;
 Field of Search 714/6, 805, 799,
 References Cited
U.S. PATENT DOCUMENTS
5,485,598 1/1996 Kashima et al 395/182.04
5,634,109 5/1997 Chen et al 395/470
5,754,888 5/1998 Yang et al 395/872
5,765,183 6/1998 Kojima et al 714/805
Anujan Varma et al., "Destaging Algorithms lor Disk Arrays
With Non-Volatile Caches", 1995, pp. 183-95.
Jai Menon et al., "The Architecture ol a Fault-Tolerant
Cached RAID Controller", 1993, pp. 76-86.
The present invention relates to the last destaging method using a parity engine, and more particularly to the last destaging method lor constituting and administering the cache ol disk array in order to minimize lowering ol write performance which occurs in high-speed disk array controller using VRAM parity engine.
According to the invention, the disk cache is composed ol the read cache, the write cache and the destaging cache. The write caching is processed as being divided into the write cache and the destaging cache. The destaging cache, which has just one more block for mid parity to its data block, uses less memory and enables the write cache to be allocated with more blocks, and thereby it can improve hit ratio ol cache. Write requests are first stored on the write cache, and il the write cache is lull, they move blocks that would be least used thereafter into the destaging cache. Once destaging is requested, it is practicable with one parity calculation and two write operations by selecting blocks that is least recently used.
Also in destaging, block parity calculation can increase its speed and relieve the processor burden by using a VRAM based parity engine which has its dual ports.