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(12) United States Patent ao) Patent No.: us 6,498,822 Bi

Tanaka (45) Date of Patent: Dec. 24,2002 U.S. Patent Dec. 24,2002 Sheet 2 of 3 US 6,498,822 Bl

(54) FREQUENCY AND TIMING

SYNCHRONIZATION CIRCUIT MAKING
USE OF A CHIRP SIGNAL

(75) Inventor: Hiroshi Tanaka, Tokyo (JP)

(73) Assignee: NEC Corporation, Tokyo (JP)

( * ) Notice: Subject to any disclaimer, the term ol this patent is extended or adjusted under 35 U.S.C. 154(b) by 0 days.

(21) Appl. No.: 09/295,395

(22) Filed: Apr. 21, 1999

(30) Foreign Application Priority Data

Apr. 24, 1998 (JP) 10-129699

(51) Int. C I. 11041. 7 00

(52) U.S. CI 375/354; 375/139

(58) Field of Search 375/139, 349,

375/354, 340, 343; 327/161, 165

(56) References Cited

U.S. PATENT DOCUMENTS

5,305,347 A * 4/1994 Roschmann et al 375/150

FOREIGN PATENT DOCUMENTS

JP 9-8765 1/1997

JP 9-200081 7/1997

WO WO 96/19056 6/1996

OTHER PUBLICATIONS

Kohno R Et Al: "Array Antenna Beamforming Based On Estimation Ol Arrival Angles Using DFt On Spatial domain" IEEE International Symposium on Personal, Indoor and Mobile Communications, (PIMRC 91), London (UK), Sep. 1991, pp. 38-43, XP010212327.

Oppenheim A V Et Al: "Signal and systems", 1983, Englewood Cliffs, NJ, USA, Prentice-Hall, USA XP002198026 ISNB: 0-13-809731-3.

* cited by examiner

Primary Examiner—Stephen Chin

Assistant Examiner—Kevin Kim

(74) Attorney, Agent, or Firm—Sughrue Mion, PLLC

(57) ABSTRACT

To surely detect a frequency shift and a timing difference ol a received signal making use ol a chirp signal even when the C/N ratio ol the received signal is low by resolving the problem ol resolution ol FFT processing, a frequency and timing synchronization circuit comprises: a chirp signal generator (6) lor generating a relerence chirp signal and a conjugate complex signal ol the relerence chirp signal; a first demodulator (7) lor obtaining a first in-phase complex signal and a first quadrature-phase complex signal by demodulating the received signal with the relerence chirp signal and the conjugate complex signal a frequency offset circuit (5) for obtaining an offset signal by shifting a frequency ol the received signal; a second demodulator (8) for obtaining a second in-phase complex signal and a second quadrature-phase complex signal by demodulating the offset signal with the relerence chirp signal and the conjugate complex signal; and a detector unit (9) for detecting the frequency shift and a difference ol the synchronization timing according to a first peak frequency giving a maximum power spectrum among frequency components ol the first and the second in-phase complex signal, and a second peak frequency giving a maximum power spectrum among frequency components ol the first and the second quadrature-phase complex signal.

6 Claims, 3 Drawing Sheets

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FIG. 3 PRIOR ART

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