(12) Ullitfild States Patent (10) Patent N0.: US 7,502,992 B2
Leef et al. (45) Date of Patent: Mar. 10, 2009 (54) METHOD AND APPARATUS FOR 5,935,261 A * 8/1999 Blachek etal. ............. .. 714/42 DETECTING PRESENCE OF ERRORS IN 6,633,905 B1 10/2003 Anderson et al. 709/219 DATA TRANSMITTED BETWEEN 6,678,639 B2 1/2004 Little et al. ............... .. 702/188 COMPONENTS INA DATA STORAGE 6,681,282 B1 1/2004 Golden et al. ............. .. 710/302 212722222; 242222 i‘;‘;;%‘2iif‘ ~~~~~~~ 31.21:‘./12 , , . 6,910,148 B1 6/2005 H t 1. (75) Inventors: Phillip Leef, Brookline, MA (US); 7,039,737 B1 5/2006 DE; 3 al‘ Dellgles Sullivan, Hopkinton, MA (U3); 2005/0154841 Al * 7/2005 Sastri et al. ............... .. 711/148 Stephen Strickland, Marlboro, MA (US); Alex Sanville, Chelmsford, MA OTHER PUBLICATIONS (US) Data Sheet: EMC Clariion CX Series, EMC Corporation, 2004, 8 (73) Assignee EMC C0rP0rati0n= HOPkrmOr1= MA gilt?/S/vmnv.storagesearch.c0m/fchub.html, “The Shift to NAS Gate(US) ways,” visited Aug. 17, 2006, 4 pages. ( * ) Notice: Subject to any disclaimer, the term of this * Cited by examiner patent is extended or adjusted under 35 Primary Examl~ne,,_Phung M Chung USC" l54(b) by 336 days" (74) Attorney, Agent, or Firm—BainwoodHuang (21) Appl. NO.Z 11/394,919 (57) ABSTRACT (22) Fired? Mar- 31: 2006 A data storage system includes a storage processor that is _ _ _ configured to perfonn load and store operations on a storage (65) Prior Publication Data
array on behalf of external devices. The data storage system also includes a controller that isolates communication between the extemal devices when coupled to the storage
US 2007/0234136 A1 Oct. 4, 2007
(51) Int, C], array via the storage processor. The controller further mainG06F 11/00 (2()()6_()1) tains a set of registers that store information associated with G01R 31/28 (2()()6_()1) the data storage system and allows the storage processor to (52) U.S. Cl. ..................................... .. 714/807; 714/736 aeeess the register Via an I2C bu5~ The System urrrrZe5 an errer (58) Field of Classification Search ............... .. 714/712, dere°ri°n Pr°°ed“re 1° a11°W dere°ri°n °r ermrs in the data
transmitted between the controller and the storage processor. During operation, a checksum value is transmitted between the controller and the storage processor using the I2C bus during a register write or read procedure. The controller and
714/715, 819, 746, 748, 760, 776, 799, 48, 714/43, 39, 807, 704 See application file for complete search history.
(56) Refefellees Cited the storage processor utilize the checksum value in an error detection procedure to detect the data errors resulting intransU'S' PATENT DOCUMENTS mission of the data by the I2C bus. 5,283,792 A 2/1994 Davies et al. ............... .. 714/22 5,774,640 A 6/1998 Kurio et al. .................. .. 714/4 18 Claims, 9 Drawing Sheets
