Integrated circuit having distributed control and status registers and ...

(54) INTEGRATED CIRCUIT HAVING

DISTRIBUTED CONTROL AND STATUS
REGISTERS AND ASSOCIATED SIGNAL
ROUTING MEANS

(75) Inventor: Jurgen M. Schulz, Pleasanton, CA
(US)

(73) Assignee: Sun Microsystems, Inc., Santa Clara, CA (US)

( * ) Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 0 days.

(21) Appl. No.: 09/532,383

(22) Filed: Mar. 22, 2000

(51) Int. CI.7 G01R 31/28

(52) U.S. CI 714/724; 714/730

(58) Field of Search 714/724, 730

(56) References Cited

U.S. PATENT DOCUMENTS

4,701,921 A * 10/1987 Powell et al 714/727

4,918,379 A * 4/1990 longepier 324/73.1

5,477,548 A * 12/1995 Beenker et al 714/727

5,577,052 A * 11/1996 Morris 714/733

5.983.301 A 11/1999 Baker et al 710/113

6,065,078 A * 5/2000 Falik et al 710/100

RE36,839 E 8/2000 Simmons et al 326/93

6,115,763 A * 9/2000 Douskey et al 710/72

6,202,163 Bl 3/2001 Gabzdyl et al 713/324

6,202,166 Bl 3/2001 Tang 713/500

6,205,192 Bl 3/2001 Igura 375/354

6,232,820 Bl 5/2001 Long et al 327/374

6,247,134 Bl 6/2001 Sproch et al 713/320

6,275,081 Bl 8/2001 Flake 327/202

6,308,313 Bl 10/2001 Lakshminarayana et al. . 716/18

6.311.302 Bl * 10/2001 Cassetti et al 714/727

6,324,662 Bl * 11/2001 Haroun et al 714/724

6,334,198 Bl * 12/2001 Adusumilli et al 714/727

6,363,501 Bl * 3/2002 Tobias et al 714/30

6,408,413 Bl * 6/2002 Whetsel 714/727

6,425,100 Bl * 7/2002 Bhattacharya 714/724

FOREIGN PATENT DOCUMENTS

EP 786 727 7/1997

OTHER PUBLICATIONS

Avra, "A VHSIC ETM-BUS—Compatible Test and Maintenance Interface", 1987 International Test Conference, pp. 964-971.*

"The CoreConnectTM Bus Architecture," International Business Machines Corp., XP-002204519, 1999, pp. 1-9. "Figure Fight," Nick Flaherty, Electronics Times, Jul. 16, 20014 pages.

International Search Report for PCT/US 01/07911, mailed Jul. 22, 2002.

* cited by examiner

Primary Examiner—Stephen M. Baker

(74) Attorney, Agent, or Firm—Meyertons, Hood, Kivlin,

Kowert & Goetzel, PC; B Noel Kivlin

(57) ABSTRACT

An integrated circuit is presented having a plurality of logic modules dispersed about a surface of a semiconductor substrate. Each logic module includes a set of control and status registers including at least one control register storing a control value. A functional unit of each logic module performs one or more logic functions dependent upon the control value stored in the control register. A central controller is coupled to the each of the logic modules. The central controller is adapted to receive address, data, and control signals (e.g., from signal lines of an external bus coupled to I/O pads of the integrated circuit), and issues read/write commands to read/write the control and status registers dependent upon the address, data, and control signals. A write command may, for example, modify the control value stored in a selected one of the control registers. The integrated circuit may include a bus which couples the central controller to each of the logic modules. The bus may, for example, couple the central controller and each of the logic modules in series forming a communication ring. In this case, the central controller and the logic modules represent separate modules along the communication ring which communicate by exchanging data via the communication ring. The data may travel in a single direction around the communication ring. The central controller and the logic modules may communicate according to an established set of communication rules.

25 Claims, 3 Drawing Sheets

D'ST C3R'S*2

□'

DIST CSR'5#5 I