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SYSTEM FOR GENERATING CORRECTION
SIGNALS FOR USE IN FORMING LOW
DISTORTION ANALOG SIGNALS
BACKGROUND OF THE INVENTION
The present invention relates generally to a method and apparatus for generating correction signals for use in forming low distortion analog signals and, more particularly, to a correction signal generator that encodes a 10 desired signal waveform into a digital data signal and a digital correction signal and stores such signals, and subsequently reads out the stored digital signals and decodes the signals into analog signals that may be summed into the desired low or ultra-low distortion 15 analog signal.
Recent advances in analog signal processing technology have created a need for testing and other devices capable of generating purer and purer analog signals. Digitizers (such as A/D converters) now exist that are 20 capable of 120 dB of dynamic range without interference from noise or distortion, and in the near future it is anticipated that signal processing technology will exist for analyzing analog signals with signal to noise and distortion ratios as high as 150 dB. However, before the 25 new signal processing technology can be effectively implemented, especially in field applications such as seismic exploration, a means must exist for calibrating and testing these new digitizers. Because there are additional constraints such as power and weight limitations 30 affecting equipment used in the field, the solution to this need has been elusive until now.
It should be recognized that there are many devices used for generating analog signals which are well known in the art. In particular, it is well known that 35 many varieties of D/A converters exist which can be used to convert digital signals to analog signals. Further, successive approximation D/A converters, particularly when oversampled, have been used with some success to achieve signal to noise and distortion ratios of 40 up to 100 dB for digital signals having as many as 18 bits.
However, it is difficult to achieve greater than 100 dB signal to noise and distortion ratios using such technology. For example, the successive approximation con- 45 verters typically use a weighting source, whether it be a current source, voltage source, or resistors. These weighting sources are difficult to control and maintain accurate over time due to temperature fluctuations and other variables, particularly when more than 16 to i8 50 bits of input are used in the D/A converter. Thus, the recent advances in analog signal processing technology render the past state of the art of test signal generation practically useless; a new means of generating analog signals with a signal to noise and distortion ratio exceed- 55 ing that of the new A/D technology is needed. Further, there is a particular need for analog signal sources that are portable and can be used for field calibration of the new digitizers.
A solution to this problem might be found in the use 60 of a device that converts a continuously generated digital datastream into a desired analog signal. Such a datastream might be a sequence of discrete time data values, such as a digital bitstream. A device such as a DPCM (differential pulse code modulator) might then be used 65 to convert, or used as a model for a program to computationally convert, the datastream into an analog signal. Also, there might be advantages in using a computa
tional program modeled on one bit D/A converter circuits, found in the feedback loops of sigma delta digitizers. Such one bit D/A converters provide linear signals and, particularly with the well-known sigma delta converter, make encoder/decoder modeling easier.
But, while such an approach may produce low noise signals, the approach would not be feasible for applications such as field use. The computations required to continuously generate an appropriate digital bitstream, capable of conversion to a desired low or ultra-low distortion analog signal, would include high speed reiterative solutions of a system of equations and require a continuous high level of power consumption. This level of computational power is highly undesirable in field equipment, which is desired to operate at as low power as practical. In fact, with respect to field applications it is estimated that the equipment needed for computing such a signal could require as much as double the power needed for current field testing equipment, and would increase the speed and cost of the computational equipment.
Thus, there is a continuing need for a system of generating a digital signal and using this signal to form an analog signal with low or ultra-low distortion, but without significant extra requirements or expenses for computational equipment and power supplies.
SUMMARY OF THE INVENTION
In a board aspect, the present invention comprises a signal generator for computationally generating digital datastreams and decoding such datastreams into analog signals that may be combined to form a low distortion analog signal. The signal generator includes the following component parts: a data signal source for outputting a desired digital data signal datastream; an encoder means for encoding the digital data signal datastream into a digital correction signal datastream; and one or more memory storage devices for storing these digital datastreams. Additionally, the signal generator may include a digital to analog decoding system for reading the digital datastreams out of memory and converting said datastreams into analog signals that may be further summed to form an analog signal having ultra-low distortion and the desired waveform.
The data signal source in one aspect encodes a periodic waveform from memory into a data digital datastream. The encoder generates a correction signal by (1) determining, based on the data digital datastream, the frequency, phase and amplitude of signal distortion that will occur when the data digital datastream is repetitively read out from the memory storage device and decoded, and (2) encoding the determined distortion into a correction signal digital datastream having the same frequency but opposite phase from that of the estimated distortion, and preferably an appropriately scaled amplitude.
After encoding the digital datastreams, the data signal source and the encoder output the digital datastreams to a memory storage device. The memory storage device may be separate to detachable from the data signal source and encoder, such that the memory storage device and a decoder may be separately transportable, as for use in bench testing and field applications.
When desired, the digital data signal datastream and correction signal datastream are repetitively and synchronously read out of memory into the decoder.
Where the digital correction signal has been encoded to include a scaled amplitude relative to the estimated distortion, the decoded correction signal is appropriately unsealed, such that the decoded correction signal has signal components in the band of interest having the 5 same frequency and amplitude, but opposite phase form, the distortion in the decoded data signal. The decoder sums both signals in the analog domain so that the correction signal superposes with the data signal. The invention is thereby capable of producing output correc- 10 tion signals that may form low or ultra-low distortion analog signals. Thus, analog signals capable of signal/noise ratios greater than about 120 dB, and especially greater than about 150 dB, are contemplated.
In a more particular aspect of the present invention, a 15 signal generator is provided which includes a computational means for encoding a desired discrete time, periodic waveform into a digital datastream. A segment of this data digital datastream, corresponding to a period of the periodic waveform, is stored in a memory storage device. The phase and amplitude of the signal distortion of the data digital datastream are then computationally estimated, and a correction signal digital datastream containing distortion of opposite phase and appropri- ^ ately scaled amplitude form that of the distortion components of the data signal is computationally encoded. A segment of the correction signal, corresponding to the same segment of the discrete time waveform as the stored data digital datastream, is stored in a memory 3Q storage device. Then, at a desired time and location, both the data signal and correction signal are repetitively and synchronously read out of memory. The digital datastreams are inputted to individual switches which are connected to both sides of a reference volt- 35 age source. These switches alternately output a positive or negative reference voltage as the data types in the inputted datastream alternate, for example, such as when the datastream is a bit stream and the bit types alternate between 0 and 1. The correction signal and the 40 data signal outputted form the switches are then inputted into a summing low-pass filter which sums both the data signal and the correction signal, with appropriate scale factors, in the analog domain. The scaling of the signals is accomplished by use of resistors having appro- 45 priate resistances such that the resultant value of the amplitudes of the correction signal and of the distortion components of the data signal within the band of interest are the same, and may be superimposed to cancel the distortion. Thus, the analog output from the summing 50 low pass filter becomes capable of ultra-low distortion.
In another aspect, the present invention comprises a method of generating a correction signal that, when summed with the data signal, forms a low or ultra-low distortion signal. The method includes the steps of en- 55 coding a discrete time waveform into a data signal which is a one-bit digital bitstream and storing a segment of this data signal in a memory. Next, the frequency, phase and amplitude of the signal distortion that the data signal will have when read out of memory 60 are computed, and then encoded into a correction signal having opposite phase and appropriately scaled amplitude from the signal distortion of the data signal. A segment of this correction signal is then stored in a memory. Next, the data signal and correction signal 65 digital bitstream segments are read out of memory repetitively and synchronously. Finally, the data signal and appropriately scaled correction signal are decoded,
and the decoded signals are summed forming an analog signal which is capable of low or ultra-low distortion.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1(a) depicts a block diagram of a preferred embodiment of computational stages through which a correction digital datastream, which may later be decoded along with a data digital datastream and combined to form a low or ultra-low distortion analog signal, is generated;
FIG. 1(b) depicts a block diagram of a preferred embodiment of stages of memory readout and decoding by which the data and correction digital datastreams, generated by the computational stages illustrated in FIG. 1(a), are converted into analog signals and summed into a low distortion analog signal;
FIG. 2 illustrates a flow-chart of a preferred embodiment of computational steps by which the signal distortion, which the data digital datastream will have when later read out of memory, is computationally estimated and the correction digital datastream is encoded form the determined signal distortion;
FIG. 3(a) illustrates a graph of the analog signal (including signal noise) created where a digital data signal is continuously generated and decoded;
FIG. 3(b) illustrates a graph of the signal noise (without the fundamental of the data signal) created where a digital data signal is continuously generated and decoded;
FIG. 3(c) illustrates a graph of the analog signal (including signal noise) created where an one period segment of a digital data signal is repetitively read out of a memory source and decoded;
FIG. 3(d) illustrates a graph of a decoded correction signal;
FIG. 3(e) illustrates a graph of an ultra-low distortion analog signal resulting from the summing of decoded data and correction signals;
FIG. 4 illustrates a block diagram of a preferred embodiment of a memory readout and decoding circuit used to convert the data and correction digital datastreams and sum them to form a low distortion analog signal; and
FIG. 5 illustrates a block diagram of another preferred embodiment of a memory readout and decoding circuit.
While the system is susceptible to various modifications and alternative forms, specific embodiments thereof have bene shown by way of example in the drawings and will herein be described in detail. It should be understood, however, that this specification is not intended to limit the invention to the particular forms disclosed herein, but, on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.
DESCRIPTION OF THE PREFERRED
Referring now to the drawings, FIG. 1(a), is a block diagram of the computational components of a signal generator 1, and a memory 21, in accordance with a presently preferred embodiment of the invention. All of these computational components are preferably composed of a computer using program steps as discussed below.
A digital data signal source 5 outputs a digital data signal segment. Because distortion in the outputted
digital data signal segment limits the signal-to-noise ratio that may be achieved in the desired final output low distortion analog signal, the digital data signal source 5 preferably has characteristics such that it outputs a low or ultra-low distortion digital data signal 5 segment. Preferably, such low-distortion digital output is achieved computationally, where the digital data signal source 5 includes a data signal waveform generator 10 and a data signal encoder 11.
Thus, preferably, a waveform generator 10 generates 10 a digital representation of a desired discrete time, periodic waveform. This discrete time waveform will preferably be a periodic sinusoidal waveform, having approximately the same frequency, time, phase and amplitude characteristics as the final output analog signal (60) 15 has within a frequency band of interest. Distortion, if any, remaining in the final output analog signal is desired to be ultra-low in amount. The waveform generator 10 output is preferably generated by using mathematical functions of a conventional software language, 20 such as sinusoidal functions, and a program that adjusts the characteristics of the waveform, such as amplitude, phase or period, based on user inputs. Such software languages are well-known in the art, and an example of commercially available software language that works 25 well as a waveform generator is Microsoft C. It should be recognized, however, that the waveform generator 10 may use other than electronic means, such as optical processing, to generate a digital representation of the periodic waveform; in such an event other means, such 30 as optical processing means, may also be used, instead of electronic or computer means, to computationally encode the desired digital data and correction signal data stream segments. Further, the periodic sinusoidal waveform need not be a simple sinusoidal waveform, but may 35 be a complex waveform such as one composed of many superimposed sinusoidal waveforms.
The output form the waveform generator 10, which is typically in the form of a continuous stream of multibit bytes, is computationally encoded into a digital 40 datastream segment by the data signal encoder 11. The data signal encoder preferably encodes the digital datastream segment as a one-bit bitstream segment of one data signal cycle, although multiple-but bitstreams and other datastreams, and segments other than one data 45 signal cycle in length, may also be used. The data signal encoder 11 preferably encodes the waveform generator 10 output by means of conventional software programming techniques, where such software programming preferably simulates the process of a sigma delta en- 50 coder, which is well-known in the art. An example of one such sigma delta encoder is shown at FIG. 1 in J. C. Candy, "Decimation for Sigma Delta Modulation," IEEE Transactionson Comms., Vol. Com-34, 72-76, Jan. 1986. One skilled in the art may readily develop a 55 software program simulating such a sigma delta encoder. The resulting data signal digital datastream segment is then both stored in memory 21 and inputted into digital correction signal generator 6.
The digital correction signal generator 6 preferably 60 includes a distortion estimator 12 and a correction signal encoder 20. The distortion estimator 12 computationally determines the phase and amplitude of the signal distortion created by repetitively reading out the data signal digital datastream segment from memory 21. 65 The distortion estimator 12 has parameters such that it produces a distortion digital datastream containing distortion of opposite phase and appropriately scaled am
plitude as that of the signal distortion that will result from repetitively reading out the data signal digital datastream segment from memory 21 Because the distortion digital datastream has an opposite phase, the correction signal (obtained by encoding the distortion digital datastream with the correction signal encoder 20) and data signal can be superposed in the analog domain. Consequently, any distortion remaining in the resulting signal is at an ultra-low level. Further, the amplitude of the distortion digital datastream (and hence the correction signal) may be increased, preferably by a scale factor much greater than 1. this increase is amplitude makes distortion in the correction signal itself, resulting when the correction signal is repetitively read out of memory, relatively negligible compared to the signal distortion determined by the distortion estimator 12 and encoded in the correction signal. Thus, the increase in amplitude practically eliminates any distortion that might otherwise be created by reading out the correction signal. However, it should be recognized that application of the scale factor may be omitted if the band of interest is so narrow that no multiples of the fundamentals of the correction signal (occurring as the digital correction signal segment is read-out and decoded) fall within the band of interest.
The distortion digital datastream information is outputted from the distortion estimator 12 and computationally encoded by the correction signal encoder 20. The correction signal encoder 20 has parameters such that it encodes the correction digital datastream by a similar method as that used by the data signal encoder 11, i.e., preferably by use of a software program simulating the process of a sigma delta encoder and preferably encoding the correction signal as a one-bit bitstream. Preferably the correction signal encoder 20 comprises the same software program s the data signal encoder 11. Thus, the correction signal encoder 20 produces a correction signal digital datastream segment containing distortion of opposite phase and appropriately scaled amplitude as that of the signal distortion resulting from repetitively reading out the data signal digital datastream segment from memory 21.
The output of the correction signal encoder 20, i.e., a correction signal digital datastream segment, is stored in memory 21. For economy of storage and ease of transportation, a single memory 21 preferably store both datastream segments, although more than one memory device or different locations on the same memory storage device may be used to store the datastream segments. Memory storage device 21 may be separate or detachable from the computational components of the signal generator 1, such that the memory storage device 21 may be transportable for uses including, but not limited to, laboratory or field applications.
Turning now to FIG. 1(A), this figure shows a block diagram of a preferred embodiment of the memory readout and decoding portions 25 that are used in converting the correction and data digital signals into analog signals that may be summed to form the desired low distortion analog signal. These portions ay be detachable and transportable separate from the computational components of the signal generator 1. A synchronous read out means 26 repetitively, continuously and synchronously reads out the data signal digital datastream segment and the correction signal digital datastream segment from memory 21. Circuits, which may serve as such synchronous read-out means 26, are well-known in the art. While it is preferable that the two digital datas