A method and system for operating a DRAM device in either a high power, full density mode or a low power, half density mode. In the full density mode, each data bit is stored in a single memory cell, and, in the half density mode, each data bit is stored in two memory cells that are refreshed at the...http://www.google.fr/patents/US7072237?utm_source=gb-gplus-shareBrevet US7072237 - Method and system for low power refresh of dynamic random access memories
Method and system for low power refresh of dynamic random access memories
