3 4
over the radio channel. The base station 10 stores the tion board 50 and security module has sent the data by
ID code and a corresponding KEY code and, therefore, referencing the address that heads the serial data
locates the mobile station which has requested call orig- SDATA.
ination. Then, the base station 10 generates random data FIG. 6 shows specific circuiry built in the 1-chip
R and sends it to the transmitter/receiver 20. At the 5 microcomputer constituting the security module 30. As
same time, the base station 10 holds the result of encryp- shown, the microcomputer has a serial interface 301 to
tion (C=F(R, KEY)) executed by a one-directional which the three lines LI through L3 are connected. A
function on the basis of the KEY code. On receiving the non-volatile memory 302 which is an E2PROM stores
random data R, the transmitter/receiver 20 transfers it the KEY code therein. An encrypting circuit 303 exe
to the security module 30 via the interface 200. The 10 cutes encryption by use of the KEY code and is made
security module 30 stores a KEY code and encrypts the up of a CPU, ROM and RAM. A control circuit 304 has
random data by a one-directional function on the basis a test terminal 305 connecting to the non-volatile mem
of the KEY code, delivering the result of encryption 0ry 302 and delivers a clear pulse CPLS to the memory
(C'=F(R, KEY)) to the transmitter/receiver 20. In 302 to delete the KEY code. Such components of the
response, the transmitter/receiver 20 sends the result C 15 security module 30 are connected together by internal
to the base station 10 over the radio channel. Then, the buses 306 and 306a.
base station 10 compares the received result C with the When random data R is applied to the security modstored result C and, only if they are identical, executes uie 30 via the serial interface 301, the encrypting circuit call connection over the radio channel. 303 encrypts it by the KEY code. In the illustrative FIG. 3 shows specific connection of the transmitter/- 20 embodiment, the encryption is implemented by a onereceiver 20, operation board 50, and security module 30. directional function, e.g.: In the figure, the transmitter/receiver 20 is connected
to the operation board 50 and security module 30 via the Encrypted data=(random data^51. (mod KEY2) interface 200 and by two bidirectional lines LI and L2
and a single clock line L3. The bidirectional lines LI 25 where KEY1 and KEY2 are representative of predeter
and L2 are assigned to serial data SDATA and a busy mined portions of the KEY code. For this kind of ap
signal BUSY, respectively, while the clock line L3 is proach, a reference may be made to S. C. Pohlig and M.
assigned to a clock SCK. More specifically, as shown in E. Hellman "An Improved Algorithm for Computing
FIG. 4, the lines LI through L3 constituting a serial Logarithms over GF (p) and Its Cryptographic Signifi
interface are connected to a master device and a slave 30 cance", IEEE Transaction on Information Theory,
CPU #1 built in the transmitter/receiver 20, a slave Vol. IT-24, January 1978, pp. 106-110.
CPU #2 built in the security module 30, and a slave The data encrypted by the above procedure is sent
CPU #3 built in the operation board 50. FIG. 5 is a out again via the serial interface circuit 301.
timing chart showing the serial data SDATA, busy A prerequisite with the security module or 1-chip
signal BUSY, and clock SCK. 35 microcomputer 30 is that the operations of the non
As shown in FIG. 3, the security module 30 is imple- volatile memory 302 and encrypting circuit 303 be
mented as a 1-chip microcomputer having an interface tested by some method after the production. Neverthe
therein, e.g. MC68HC11E9 available from Motorola. less, the KEY code stored in the non-volatile memory
Since the security module 30 accommodates the three 302 has to be prevented from being read out for authen
lines LI through L3 in parallel, it can be added to an 40 tication. The control circuit 304 is incorporated in the
existing radio telephone without the latter being modi- module 30 for meeting this requirement. Specifically,
fied. while the microcomputer is in an ordinary operation,
Upgoing data and downgoing data interchanged the test terminal 305 remains inactive so that the internal among the transmitter/receiver 20, security module 30 bus 306 is isolated from the outside by the control cirand operation board 50 will be described with reference 45 cuit 304. In this condition, the encrypting circuit 303 to FIGS. 3 through 5. To begin with, downgoing data and memory 302 are accessible in the microcomputer, from the transmitter/receiver 20 to the operation board When the test terminal 305 is rendered active for a 50 of the security module 30 is implemented by the testing purpose or in the event of unauthorized operaserial data which is synchronous to the clock SCK. tion, the control circuit 304 connects the internal bus Whether the downgoing data is meant for the operation 50 306 and an external bus 307 so that the non-volatile board 50 or for the security module 30 is determined on memory 302 and encrypting circuit 303 become accessithe basis of an address heading the serial data SDATA. ble via the external bus. However, a differentiating The BUSY line L3 indicates whether or not the inter- circuit 304a of the control circuit 304 feeds a clear pulse face 200 is occupied. By referencing this line L3 before CPLS to the non-volatile memory 302 to thereby clear the transmission of data, it is possible to prevent upgo- 55 the content of the memory 302, i.e., the KEY code. As ing and downgoing data from conflicting with each a result, although the memory 302 and encrypting cirother. Specifically, the busy signal BUSY is in a low cuit 303 may be tested thereafter, the KEY code has level or "L" if the interface 200 is in use or in a high been deleted and, therefore, is not read out. level or "H" if otherwise. Regarding upgoing data, the More specifically, when the test terminal 305 is operation board 50 or the security module 30 checks the 60 brought to a high level, the control circuit 304 connects BUSY LINE L3 to see if the interface 200 is in use. If the external bus 307 to the internal bus 306 and at the the interface line 200 is idle, the operation board 50 or same time provides a clear pulse CPLS to the memory the security module 30 uses the line L3. Then, the trans- 302 to erase the KEY code therein. The high level at the mitter/receiver 20 sends the clock SCK to the opera- terminal 305 is also applied to the encrypting circuit 303 tion board 50 or the security module 30. In response, the 65 as a bus request, so that the encrypting circuit 303 abanoperation board 50 of the security module 30 sends dons to seize the internal bus 306. Then, an external serial data SDATA in synchronism with the clock. The device (not shown) can access the memory 302 via transmitter/receiver 20 determines which of the opera- buses 307 and 306 to exchange data, e.g., addresses
