A multiple path, self-routing switching network for switching asynchronous time division multiplex data cells includes input ports (pi1, pi64 . . . ), output ports (po1, po64 . . . ) and switching elements (TSi1, TSi16 . . . ) arranged in a number of stages of interconnected switching elements, each...http://www.google.fr/patents/US5237565?utm_source=gb-gplus-shareBrevet US5237565 - Multiple path, self-routing switching network for switching asynchronous time division multiplex cells
Multiple path, self-routing switching network for switching asynchronous ...
