CONTROL SYSTEM FOR MOTORS AND
INDUCTIVE LOADS
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the field of control systems for inductive electrical loads, including motors, and in particular, to controlling the amount of current flowing through an inductive load.
2. Background Art
Electrical circuits often include inductive components. In some circuits, the amount of current required by the inductive components varies over time. To optimize performance of an electrical system and components such as power supplies and switching devices, it may be desirable to limit the amount of current which may flow through inductive components.
Motors are one type of inductive component for which it is desirable to control operating current. In the prior art, two methods have been used to control current in motors. One prior art method is known as linear control. Linear current control allows a steady current to flow at a controlled level. A second method of the prior art is known as pulse width modulation (PWM). Pulse width modulation causes current to be applied in pulses of a fixed level. Pulse width modulation allows current to be controlled by varying the width of the pulses. By switching current fully on or fully off, pulse width modulation achieves great efficiency by avoiding losses associated with linear current control. However, by generating pulses, pulse width modulation can introduce electrical and acoustic noise into the systems in which it is employed. Such noise can interfere with other components of the system and can annoy the users of the system.
Certain prior art motor controllers have allowed operation of motors in either the linear or PWM modes. However, these motor controllers do not allow automatic selection of linear or PWM operation. The operating mode of the controller (linear or PWM) must be selected by circuits external to the controller circuit and thus, the controller may be in the linear mode when it should be in the PWM mode, resulting in decreased efficiency. Also, the motor may be in the PWM mode when it should be left in the linear mode, increasing the presence of noise in the system.
One prior art motor controller is the Micro Linear ML4411. The ML4411 allows linear and PWM operation, but uses variable frequency PWM, which requires a one-shot timing circuit. Also, the ML4411 requires upper and lower drivers of opposite semiconductortype polarities.
SUMMARY OF THE PRESENT INVENTION
The present invention provides a system for controlling circuits that contain inductive elements. Since the present invention allows operation in either the linear or PWM mode, it avoids the disadvantages of operating in 60 only one of the two modes. Since the present invention does not use the constant off time variable frequency PWM method of the prior art, it avoids some of the noise problems and complexities associated with variable frequency PWM. Also, the present invention al- 65 lows automatic switching between the PWM mode and linear mode, depending upon the current demands of the inductive device.
In the present invention, current through the inductive device is measured and compared to a specified value. A time-base circuit provides periodic pulses that allow current to flow through the inductive device. The current through the inductive device increases over time. If the current through the inductive device exceeds the specified value, the current is shut off until the next pulse from the time base circuit. Thus, when the inductive device demands a large amount of current, the current will exceed the specified value, and only a short pulse of current will be applied over that timing cycle. However, if the inductive device draws less current, the current will not exceed the specified value as quickly. Thus, a longer pulse of current will be allowed to flow during that timing cycle. If the inductive device draws even less current, the amount of current may not exceed the specified value over the entire timing cycle. In this case, the current will be allowed to flow continuously for the duration of the timing cycle and into subsequent timing cycles.
In the preferred embodiment of the present invention, control of current through motor windings is provided. Many motor applications require larger amounts of current while the motor is starting and accelerating and use less current when operating "at speed"(at normal operating speed). With the present invention, the current required for starting and acceleration can be limited using pulse width modulation. As the motor reaches "at speed" operation, the controller automatically switches to linear mode operation to reduce operating noise.
The preferred embodiment of the present invention also allows commutation switching to be performed with the same switching elements used for pulse width modulation. The preferred embodiment of the present invention also generates timing signals to coordinate back-EMF comparison with PWM switching. Also, the present invention is not limited to use with switching devices of opposite semiconductor polarities, but may be practiced with switching devices of a single semiconductor polarity.
Since the present invention provides adaptive linear and PWM current control for inductive loads without complicated circuitry, a much simpler, quieter and more efficient method of current control for inductive loads has been provided.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a schematic diagram illustrating a prior art circuit for linear and PWM operation.
FIG. 2 is a schematic diagram illustrating the preferred embodiment of the present invention.
FIG. 3 is a timing diagram illustrating the timing relationships of the preferred embodiment illustrated in FIG. 2.
FIG. 4 is a timing diagram illustrating current and voltage through active motor windings of a motor controlled by the preferred embodiment of the present invention.
FIG. 5 is a schematic diagram illustrating an alternate embodiment of the present invention.
FIG. 6 is a diagram illustrating an alternate embodiment of the present invention with PWM switching occurring at the upper switching devices.
FIG. 7 is a diagram illustrating an alternate embodiment of the present invention with PWM switching occurring at the lower switching devices.
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DETAILED DESCRIPTION OF THE PRESENT
INVENTION
A control system for motors and inductive loads is described. In the following description, numerous spe- 5 cific details, such as conductivity type, motor type, etc., are described in detail in order to provide a more thorough description of the present invention. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without these spe- 10 cific details. In other instances, well known features have not been described in detail so as not to obscure the present invention.
An example of a prior art circuit for linear and PWM modulation is illustrated in FIG. 1, A commutation 15 logic signal 117 and a DISPWR signal 118 are provided as inputs to AND gate 106, along with the output 116 of one-shot multivibrator 105. The output 119 of the AND gate 106 is coupled to buffer 107. The output 120 of buffer 107 is coupled to driver 101. Port 112 of driver 20 101 is coupled through sensing resistor 102 to ground and to the input of amplifier 103. Port 111 is coupled to one of a plurality of inductive loads (not shown) coupled in a star configuration. Additional elements (not shown), identical to elements 106,107 and 101 of FIG. 25 1, are coupled in a similar fashion to drive the other inductive loads.
A current limit signal 114 is coupled to the noninverting input of amplifier 104, The output 113 of amplifier 103 is coupled to the inverting input of amplifier 30 104, The output 115 of amplifier 104 is coupled to oneshot 105, The timing of one-shot 105 is controlled by capacitor 109 coupled on line 123 to one-shot 105 and to
vcc.
Signal 121 (I(CMD)) is coupled to the non-inverting 35 input of amplifier 108. Output 113 of amplifier 103 is coupled to the inverting input of amplifier 108. The output 122 of amplifier 108 is coupled through capacitor 110 to ground and to buffer 107.
The control circuit of the prior art includes a linear 40 control loop and a PWM control loop. The linear control loop senses the motor current on the ISENSE terminal of amplifier 103 through sensing resistor 102. The internal current sense amplifier (108) output modulates the gate of N-channel MOSFET 101 via buffer 107. 45 Buffer 107 has a totem pole output capable of sourcing and sinking up to 10 millilamps to drive the gate of FET 101.
The circuit also includes a current mode constant off time PWM circuit. When motor current builds to the 50 threshold set on ILIMIT 114, the one-shot 105 is triggered (with timing set by capacitor 109). The current in the motor is then controlled by the lower of signals 114 and 121.
The preferred embodiment of the present invention is 55 illustrated in FIG. 2. Two timing signals, Tl and T2, are generated by a time-base circuit (not shown). Tl is coupled to one input of NOR gate Nl. The other input of NOR gate Nl is the output of NOR gate N2. The output of NOR gate Nl is signal PWMC and is coupled 60 to one input of OR gate 201 and to one input of NOR gate N2. The other input of OR gate 201 is a signal UPA* (this signal is active low). The output UPAS of OR gate 201 is coupled to the gate of P-type drive transistor MAPU. The source of transistor MAPU is 65 coupled to voltage VM. The drain of transistor MAPU is coupled to node A and through diode DDA to ground.
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A VIN signal is coupled to the inverting input of comparator COMP1. The output of comparator COMP1 is coupled to node VCOMP. VCOMP is coupled to one input of NOR gate N2 and to one input of NOR gate N4. Timing signal T2 is coupled to NOR gate N3 along with the output of NOR gate N4. The output of NOR gate N3 is coupled to the other input of NOR gate N4 and is inverted to provide signal SMPL.
Node A is coupled to motor coil LMA. Motor coil LMC is coupled to the junction of coils LMA and LMB, as is control signal CT. One terminal of motor coil LMB is coupled at node B to diode DDB (the other side to ground), and the drain of drive transistor MBND. The gate of drive transistor MBND is coupled to signal DNB. The source of transistor MBND is coupled to voltage VRS. Voltage VRS is coupled to the non-inverting input of amplifier AMP1 and through resistor RS to ground. Resistor R2 is coupled between the inverting input of amplifier AMP1 and ground. The output of amplifier AMP1 is coupled in a feedback loop through resistor Rl to the inverting input. The output of amplifier AMPI is signal VRSA and is coupled to the non-inverting input of comparator COMP1.
Not shown in FIG. 2 are: MAND and MCND transistors coupling nodes A and C, respectively, to VRS, similar to MBND; NOR gate 201B coupled to a transistor MBPU for coupling node B to VM, and similarly, NOR gate 201C coupled to a transistor MCPU for coupling node C to VM; and a diode DCC, similar to DDA and DDB, for coupling node C to ground.
As noted above, signals Tl and T2 are generated by a time-base circuit that is not shown. Referring briefly to FIG. 3, the rate of Tl is such that TP is approximately 20-100 microseconds. The width of Tl (TW) is approximately 1-5 microseconds, and the width of T2 (TS) is similar. The delay of T2 from Tl (TD) is typically 10-20 microseconds in the preferred embodiment of the present invention.
Tl forces the output (PWMC) of NOR gate Nl to the low state. Assuming VCOMP is low, PWMC stays low after Tl goes low, and for UPA* low, the drive transistor MAPU is turned on (since it is a P-channel MOSFET).
With DNB, the gate signal to drive transistor MBND at a high potential, MBND is also on and current flows through the coils LMA and LMB. Because these coils are inductors, the current increases in value over time. The current flow (and flow increase) shows as VSRA, the amplified version of VRS. When VRSA is greater than voltage VIN, comparator COMP1 causes VCOMP to go high, and through the action of NOR gate N2, forces PWMC high. This, in turn, drives transistor MAPU to be off and interrupts current flow from the power supply VM. The inductive load forces a continuation of current flow through diode DDA. This can be seen in case 1 of FIG. 3.
Referring to FIGS. 2 and 3, case 2 of FIG. 3 shows a similar sequence, except that the time it takes for VRSA to reach VIN is a larger fraction of time (TP), the time between Tl events. Case 3 shows a third possibility, where the current never reaches a value such that VRSA exceeds VIN for a time span of one or more Tl events. In this case, PWMC stays low, the drive transistor MAPU stays on continuously and the switch mode operation is not required, since the motor current never reaches the limit value. Also shown in FIG. 2 is a sampling signal SMPL, to be used to determine motor position for commutation of motors that do not include
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