CAM WITH AUTOMATIC WRITING TO THE
NEXT FREE ADDRESS
FIELD OF THE INVENTION
The invention relates to Content Addressable Memories (CAMs) and more specifically to a method and apparatus for automatically writing non-matching data to a location not already holding valid data.
BACKGROUND OF THE INVENTION
A content addressable memory (CAM) is a memory device that accelerates any application requiring fast searches of a database, list, or pattern, such as in database machines, image or voice recognition, or computer and communication networks. CAMs provide benefits over other memory search algorithms by simultaneously comparing the desired information (i.e., data input to the device or in the comparand register) against the entire list of pre-stored entries. As a result of their unique searching algorithm, CAM devices are frequently employed in network equipment, particularly routers and switches, computer systems and other devices that require rapid content searching.
In order to perform a memory search in the aboveidentified manner, CAMs are organized differently than other memory devices (e.g., random access memory (RAM), dynamic RAM (DRAM), etc.). For example, data is stored in a RAM in a particular location, called an address. During a memory search on a RAM, the user supplies the address and gets back the data stored in that address (location).
In a CAM, however, data is stored in locations in a somewhat random fashion. The locations can be selected by an address, or the data can be written into a first empty memory location (also known as the NFA or Next Free Address). Once information is stored in a memory location, it is found doing a memory search by comparing every bit in any memory location with every bit of data in a comparand register circuit. When the content stored in the CAM memory location does not match the data placed in the comparand register, the local match detect circuit associated with the CAM memory location returns a no-match indication. When the content stored in the CAM memory location matches the data placed in the comparand register, the local match detect circuit associated with the CAM memory location returns a match indication. If a match is found then the CAM returns the identification of the memory address location in which the matching data is stored or address locations of a highest priority memory location if more than one memory location contained matching data. Thus, with a CAM, the user supplies the data and gets back an indication of an address where a matching data is stored in the memory.
In typical applications where CAMs are utilized, it is desirable to write in new data not found in a database (a so-called learning operation), wherein when the data searched for is not found as matching data in the database, the search for data is stored in an empty location in the CAM. In prior art, the learning operation in a CAM is comprised of a sequence of operations including a) a search for the data in the database; b) a new search operation specifically to find the next free address NFA, and c) a write process wherein the new "learned" data is stored at the NFA location. Consequently, a CAM array which avoids these cumbersome and time-consuming operations is desired.
BRIEF SUMMARY OF THE INVENTION
The present invention expedites the writing of data to a CAM array in those cases where that data does not match
5 with any of the existing data contained within the CAM array. With the invention, a write operation could be accomplished in a single clock cycle.
In one aspect, the invention provides a plurality of memory storage locations, each having an associated indi
10 cator for indicating that the memory storage location is available for data storage and an associated match line for indicating if a search word matches a word stored in the memory storage location. The invention also provides a priority encoder circuit having a plurality of inputs coupled
15 to received signals from the indicators and match lines, with the priority encoder being operable in a first mode to indicate the address of a highest priority match on the match lines and in a second mode to indicate a highest priority storage location available for data storage. The invention can deter
20 mine an NFA prior to writing new data into the CAM.
BRIEF DESCRIPTION OF THE DRAWINGS
The above and other features of the invention will be more 25 clearly understood from the following detailed description of the invention provided in connection with the accompanying drawings.
FIG. 1 depicts a simplified block diagram of a router employing a CAM array equipped with a multi-match circuit 30 of the present invention;
FIG. 2 shows a first embodiment of the invention;
FIG. 3 is a block diagram of the priority encoder;
FIG. 4 is a schematic diagram of the highest priority indicator;
35 FIG. 5 is a schematic diagram of the address encoder; FIG. 6 shows use of a CAM in accordance with the present invention used within a processor system.
DETAILED DESCRIPTION OF THE 40 INVENTION
FIG. 1 is a simplified block diagram of a router 100 connected to a CAM array memory chip 104 as may be used in a communications network, such as, e.g., part of the
45 Internet backbone. The router 100 contains a plurality of input lines and a plurality of output lines. When data is transmitted from one location to another, it is sent in a form known as a packet. Oftentimes, prior to the packet reaching its final destination, that packet is first received by a router,
50 or some other device. The router 100 then decodes that part of the data identifying the ultimate destination and decides which output line and what forwarding instructions are required for the packet.
Generally, CAMs are very useful in router applications
55 because of their ability for instantaneous search of a large database. As a result, when a packet is received by the router 100, the router already has a table of forwarding instructions for each ultimate destination stored within its CAM. Therefore, only that portion of the packet that identifies the sender
60 and recipient need be decoded in order to perform a search of the CAM to identify which output line and instructions are required to pass the packet onto a next node of its journey.
In many applications where CAMs are used, the data 65 stored in the CAM is acquired by a process of learning or absorption, wherein a specific data value is searched in the CAM, and if not found, the data is stored (or learned) in the